RAM Reliability: References

References

Last Revision:
Apr. 9, 1998

Agrawal1993a Agrawal, V. D., Kime, C. R., Saluja, K. K.
"A Tutorial on Built-In Self-Test Part 1: Principles"
IEEE Design & Test of Computers, pp. 73-82, March 1993.

Agrawal1993b Agrawal, V. D., Kime, C. R., Saluja, K. K.
"A Tutorial on Built-In Self-Test Part 2: Applications"
IEEE Design & Test of Computers, pp. 69-77, June 1993.

APC1997 American Power Conversion
"The Problem With Power"
http://www.apcc.com/english/power/, 1997.

Baylis1998 Baylis, J.
Error-Correcting Codes
Chapman & Hall, 1998.

Blewer1994 Blewer, R. S.
"Current and Future Trends in Microcontamination Research"
IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 83-86, 1994.

Bossen1980 Bossen, D. C., Hsiao, M. Y.
"A System Solution to the Memory Soft Error Problem"
IBM Journal of Research and Development, V. 24, N. 3, pp. 390-397, May 1980.

Chakraborty1994 Chakraborty, K. and Mazumder, P.
"Technology and Layout-Related Testing of Static Random-Access Memories"
Journal of Electronic Testing: Theory and Applications, V. 5, pp. 347-365, 1994.

Chan, A., Lam D., Tan, W. and Khim, S.Y.
"Electrical Failure Analysis in High Density DRAMs"
Records of the 1994 IEEE Int. Workshop on Memory Technology, Design and Testing, pp. 26-31, 1994.

Ciciani1991 Ciciani, B.
"Redundancy Effect on Yield of Binary Tree RAMs"
Journal of Electronic Testing: Theory and Applications, V. 2, pp. 293-306, 1991.

Cockburn1992 Cockburn, B.F. and Brzozowski, J. A.
"Near-Optimal Tests for Classes of Write-Triggered Coupling Faults in RAMs"
Journal of Electronic Testing: Theory and Applications, V. 3, pp. 251-264. 1992.

Cockburn1994 Cockburn, B.F.
"Tutorial on Semiconductor Memory Testing"
Journal of Electronic Testing: Theory and Applications, V. 5, pp. 321-336, 1994.

Cockburn1995 Cockburn, B. F.
"Deterministic Tests for Detecting Scrambled Pattern-Sensitive Faults in RAMs"
Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing, pp. 117-122, August 1995.

Crucial1998 Crucial Technology, A Division of Micron
"Technical Data Library: Micron Manufactures Memory. Here's how!"
http://www.crucial.com/html/manufacturing.html, 1998.

Dance1992 Dance, D. and Gildersleeve, K.
"Estimating Semiconductor Yield from Equipment Particle Measurements"
IEEE/SEMI International Semiconductor Manufacturing Science Symposium, pp. 18-23, 1992.

Dell1997 Dell, T. J.
"A White Paper on the Benefits of Chipkill-Correct ECC for PC Server Main Memory"
http://www.chips.ibm.com, November 1997.

Dodd1996 Dodd, P. E., Sexton, F. W., Hash, G. L., et al.
"Impact of Technology Trends on SEU is CMOS SRAMs"
IEEE Transactions on Nuclear Science, V. 43, N. 6, pp. 2797-2804, December 1996.

Elm1994 Elm, C. Klein, M. and Tavangarian, D.
"Automatic On-line Memory Tests in Workstations"
Records of the 1994 IEEE Int. Workshop on Memory Technology, Design and Testing, pp. 93-103, 1994.

Freeman1996 Freeman, L. B.
"Critical Charge Calculations for a Bipolar SRAM Array"
IBM Journal of Research and Development, V. 40, N. 1, pp. 119-129, January 1996.

Fujiwara1990 Fujiwara, E. and Pradhan, D.K.
"Error-Control Coding in Computers"
IEEE Computer, pp. 63-72, July 1990.

Gaitonde1995 Gaitonde, D. D., Walker, D. M. H., Maly, W.
"Accurate Yield Estimation of Circuits with Redundancy"
The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems,
IEEE Computer Society Press, pp. 155-163, 1995.

IBM1996 IBM,
"Applications Note: Understanding DRAM Operation"
http://www.chips.ibm.com, December 1996.

IBM1997a IBM
"Fault Tolerance Decision in DRAM Applications"
http://www.chips.ibm.com, July 1997.

IBM1997b IBM
"Quality and Reliability"
http://www.chips.ibm.com, 1997.

IBM1998 IBM
"How computer chips are made."
http://www.chips.ibm.com/technology/makechip, 1998.

Inoue1993 Inoue, M., Yamada, T., Fujiwara, A.
"A New Testing Acceleration Chip for Low-Cost Memory Tests"
IEEE Design & Test of Computers, pp. 15-19, March 1993.

Johnson1989 Johnson, B. W.
Design and Analysis of Fault Tolerant Digital Systems
Addison-Wesley, 1989.

Juhnke1995 Juhnke, T. and Klar, H.
"Calculation of the Soft Error Rate of Submicron CMOS Logic Circuits"
IEEE Journal of Solid-State Circuits, V. 30, N. 7, pp. 830-834, July 1995.

Kalter1990 Kalter, H., Barth, J., Dilorenzo, J., et al.
"A 50ns 16Mb DRAM with a 10ns Data Rate"
IEEE International Solid-State Circuits Conference, pp. 232-233, 16 February 1990.

Katayama1997 Katayama, Y.
"Trends in Semiconductor Memories"
IEEE Micro, pp. 10-17, November/December 1997.

Lage1993 Lage, C., Burnett, D., McNelly. T., et al.
"Soft Error Rate and Stored Charge Requirements in Advanced High-Density SRAMs"
1993 IEEE International Electron Devices Meeting, pp. 821-824, 1993.

Lala1985 Lala, P. K.
Fault Tolerant & Fault Testable Hardware Design
Prentice Hall, 1985.

Lantz1996 Lantz II, L.
"Tutorial: Soft Errors Induced by Alpha Particles"
IEEE Transactions on Reliability, V. 45, N. 2, pp. 174-179, June 1996.

Lelis1996 Lelis, A. J., Murrill, S. R., Oldham, T.R., Robertson, D. N.
"Radiation Response of Advanced Commercial SRAMs"
IEEE Transactions on Nuclear Science, V. 43, N. 6, pp. 3103-3108, December 1996.

Levi1994 Levi, S.-T. and Agrawala, A. K.
Fault Tolerant System Design
McGraw-Hill, 1994.

Levy1995 Levy, M.
"The Dynamics of DRAM Technology Multiply, Complicate Design Options"
EDN, pp. 46-56, January 1995.

Liden1995 Liden, P. and Dahlgren, P.
"Coverage of Transistor-Level and Gate-Level Stuck-At Faults in CMOS Checkers"
IEEE Int. Symposium on Circuits and Systems, V. 3, pp. 2124-2127, 1995.

Lo1994 Lo, J.-C.
"A Fault-Tolerant Associative Approach to On-Line Memory Repair"
The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
IEEE Computer Society Press, pp. 168-184, 1994.

Lo1995 Lo, J.-C.
"Single Fault Masking Logic Designs with Error Correcting Codes"
The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
IEEE Computer Society Press, pp. 296-304, 1995.

Lu1997 Lu, S.-K., Kuo, S.-Y., Wu, C.-W.
"Fault-Tolerant Interleaved Memory Systems with Two- Level Redundancy"
IEEE Transactions on Computers, V. 46, N. 9, pp. 1028-1034, September 1997.

Lui1991 Lui, P.K. and Muzio, J.C.
"Constrained Parity Testing"
Journal of Electronic Testing: Theory and Applications, V. 2, pp. 279-291, 1991.

Massengill1996 Massengill, L.W.
"Cosmic and Terrestrial Single-Event Radiation Effects in Dynamic Random Access Memories"
IEEE Transactions on Nuclear Science, V. 42, N. 2, pp. 576- 593, April 1996.

Mazumder1993 Mazumder, P.
"Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit"
IEEE Transactions on Computers, V. 42, N. 12, pp. 1453-1468, December 1993.

McEliecee1984 McEliece, R.J.
"The Reliability of Computer Memories"
Scientific American, V. (?), 88-95, 1984 (?).

McKee1996 McKee, W. R., McAdams, H. P., Smith, E. B., et al.
"Cosmic Ray Neutron Induced Upsets as a Major Contributor to the Soft Error Rate of Current and Future Generation DRAMs"
1996 IEEE Annual International Reliability Physics, pp. 1-6, 1996.

Messenger1986 Messenger, G. C., Ash, M. S.
The Effects of Radiation on Electronic Systems,
Nostrand Reinhold, 1986.

Micron1997a Micron Technology Inc.
"Technical Note: DRAM Module Mean Time Between Failures (MTBF)"
http://www.micron.com, March 1997.

Micron1997b Micron Technology Inc.
"Technical Note: DRAM Soft Error Rate Calculations"
http://www.micron.com, March 1997.

Micron1998 Micron Technology Inc.
"Micron manufactures memory. Here's how!"
http://www.crucial.com/html/manufacturing.html, 1998.

Mori1994 Mori, K., Nguyen, N., Keeton, D., Burns, R.
"Yield Enhancement with Particle Defects Reduction"
The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
IEEE Computer Society Press, pp. 246-253, 1994.

Muzio1996 Muzio, J., Serra, M.
CSC 454 Course Notes, Section 16

Nicolaidis1996 Nicolaidis, M.
"Theory of Transparent BIST for RAMs"
IEEE Transactions on Computers, V. 45, N. 10, pp. 1141-1156, October 1996.

OGorman1994 O'Gorman, T. J.
"The Effect of Cosmic Rays on the Soft Error Rate of a DRAM at Ground Level"
IEEE Transactions on Electron Devices, V. 41, N. 4, pp. 553-557, April 1994.

OGorman1996 O'Gorman, T. J. and Ross, J. M.
"Field Testing for Cosmic Ray Soft Errors in Semiconductor Memories"
IBM Journal of Research and Development, V. 40, N. 1, pp. 41- 49, January 1996.

Okuda1997 Okuda, T. and Murotani, T.
"A Four-Level Storage 4-Gb DRAM"
IEEE Journal of Solid- State Circuits, V. 32, N. 11, pp. 1743-1747, November 1997.

Pradhan1996 Pradhan, D. K.
Fault-Tolerant Computer System Design
Prentice-Hall, 1996.

Pelton1993 Pelton, T. W.
"The Reliability of Dynamic Random Access Memory Chips"
Masters Thesis, University of Victoria, 1993.

Prince1991 Prince, B.
Semiconductor Memories (second edition)
Wiley, 1991.

Sachdev1997 Sachdev, M.
"Open Defects in CMOS RAM Address Decoders"
IEEE Design & Test of Computers, pp. 26-33, April-June 1997.

Sakata1995 Sakata, T., Horiguchi, M., et al.
"An Experimental 220-MHz 1-Gb DRAM with a Distributed-Column-Control Architecture"
IEEE Journal of Solid-State Circuits, V. 30 N. 11, pp. 1165-1173, November 1995.

Saluja1994 Saluja, K.K.
"On-Chip Testing of Random Access Memories"
Journal of Electronic Testing: Theory and Applications, V. 5, pp. 367-376, 1994.

Sarrazin1984 Sarrazin, D.B. and Miroslaw, M.
"Fault-Tolerant Semiconductor Memories"
IEEE Computer, pp. 49-56, August 1984.

Schmid1994 Schmid, J. R., Parks, H. G., Craigin R., Schrimpf, R. D.
"Estimating the Effect of Contamination-Induced Leakage Current in View of DRAM Architectural Trends"
IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 241-250, 1994.

Schnable1989 Schnable, G. L.
"Failure Mechanisms in Microelectronic Devices"
Microelectronic Reliability, Volume I, Reliability, Test and Diagnostics, (Ed. Hakim, E.B.)
Artech House, pp. 25-87, 1989.

Shen1990 Shen, Y.-N., Lombardi, F.
"Yield Enhancements and Manufacturing Throughput of Redundant Memories by Repairability/Unrepairability Detection"
Journal of Electronic Testing: Theory and Applications, V. 1, pp. 43-57, 1990.

Stapper1986 Stapper, C.H.
"The Defect-Sensitivity Effect of Memory Chips"
IEEE Journal of Solid-State Circuits, V. SC-21, N. 1, pp. 193-198, February 1986.

Taber1993 Taber, A. and Normand, E.
"Single Event Upset in Avionics"
IEEE Transactions on Nuclear Science, V. 40, N. 2, pp. 120-126, April 1993.

Taber1996 Taber, A. H. and Ziegler, J. F.
"Accelerated Testing for Cosmic Soft-Error Rate"
IBM Journal of Research and Development, V. 40, N. 1, pp. 51-72, January 1996.

Tang1996 Tang, H. H. K.
"Nuclear Physics of Cosmic Ray Interaction with Semiconductor Materials: Particle-Induced Soft Errors from a Physicist's Perspective"
IBM Journal of Research and Development, V. 40, N. 1, pp. 91-118, January 1996.

Thompson1996 Thompson, K.
"Intel and the Myths of Test"
IEEE Design & Test of Computers, pp. 79-81, Spring 1996.

Tosaka1997 Tosaka, Y., Satoh, S., et al.
"Cosmic Ray Neutron-Induced Soft Errors in Sub-Half Micron CMOS Circuits"
IEEE Electron Device Letters, V. 18, N. 3, pp. 99-101, March 1997.

Tripplite1997 Tripp Lite
"Brownouts (Undervoltages)"
http://www.tripplite.com/power/brownout.html, 1997.

Vaidya1996 Vaidya, N. H.
"Comparison of Duplex and Triplex Memory Reliability"
IEEE Transactions on Computers, V. 45, N. 4, pp. 503-507, April 1996.

vandeGoor1991 van de Goor
Testing Semiconductor Memories
Wiley, 1991.

vandeGoor1993 van de Goor, A.J.
"Using March Tests to Test SRAMs"
IEEE Design & Test of Computers, pp. 8-14, March 1993.

vandeGoor1994 van de Goor, A.J. and Zorian, Y.
"Effective March Algorithms for Testing Single-Order Addressed Memories"
Journal of Electronic Testing: Theory and Applications, V. 5, pp. 337-345, 1994.

Wood1991 Wood, J.
"Reliability and Degradation of Silicon Devices and Integrated Circuits"
Reliability and Degradation, (Ed. Howes, M. J. and Morgan, D. V.)
Wiley, pp. 191-236, 1981

Xiao1996 Xiao, S., Shi, X, Feng, G., Rao, T.R. N.
"A Generalization of the Single b-Bit Byte Error Correcting and Double Bit Error Detecting Codes for High-Speed Memory Systems"
IEEE Transactions on Computers, V. 45, N. 4, pp. 508-511, April 1996.

Youngs1997 Youngs, L., Paramanandam, S.
"Mapping and Repairing Embedded-Memory Defects"
IEEE Design & Test of Computers, pp. 18-24, January-March 1997.

Ziegler1979 Ziegler, J. F. and Lanford, W. A.
"Effect of Cosmic Rays on Computer Memories"
Science, V. 206, pp. 776-788, November 1979.

Ziegler1996a Ziegler, J. F., Curtis, H. W., Muhlfeld, H. P., et al.
"IBM Experiments in Soft Fails in Computer Electronics (1978-1994)"
IBM Journal of Research and Development, V. 40, N. 1, pp. 3-17, January 1996.

Ziegler1996b Ziegler, J. F.
"Terrestrial Cosmic Rays"
IBM Journal of Research and Development, V. 40,
N. 1, pp. 19-39, January 1996.

Ziegler1998 Ziegler, J. F., Nelson, M. E., Shell, J. D., et al.
"Cosmic Ray Soft Error Rates of 16-Mb DRAM Memory Chips"
IEEE Journal of Solid-State Circuits, V. 33, N. 2, pp. 246-252, February 1998.

Agrawal1993a	Agrawal, V. D., Kime, C. R., Saluja, K. K. "A Tutorial on Built-In Self-Test Part 1: Principles" IEEE Design & Test of Computers, pp. 73-82, March 1993.
Agrawal1993b	Agrawal, V. D., Kime, C. R., Saluja, K. K. "A Tutorial on Built-In Self-Test Part 2: Applications" IEEE Design & Test of Computers, pp. 69-77, June 1993.
APC1997	American Power Conversion "The Problem With Power" http://www.apcc.com/english/power/, 1997.
Baylis1998	Baylis, J. Error-Correcting Codes Chapman & Hall, 1998.
Blewer1994	Blewer, R. S. "Current and Future Trends in Microcontamination Research" IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 83-86, 1994.
Bossen1980	Bossen, D. C., Hsiao, M. Y. "A System Solution to the Memory Soft Error Problem" IBM Journal of Research and Development, V. 24, N. 3, pp. 390-397, May 1980.
Chakraborty1994	Chakraborty, K. and Mazumder, P. "Technology and Layout-Related Testing of Static Random-Access Memories" Journal of Electronic Testing: Theory and Applications, V. 5, pp. 347-365, 1994.
	Chan, A., Lam D., Tan, W. and Khim, S.Y. "Electrical Failure Analysis in High Density DRAMs" Records of the 1994 IEEE Int. Workshop on Memory Technology, Design and Testing, pp. 26-31, 1994.
Ciciani1991	Ciciani, B. "Redundancy Effect on Yield of Binary Tree RAMs" Journal of Electronic Testing: Theory and Applications, V. 2, pp. 293-306, 1991.
Cockburn1992	Cockburn, B.F. and Brzozowski, J. A. "Near-Optimal Tests for Classes of Write-Triggered Coupling Faults in RAMs" Journal of Electronic Testing: Theory and Applications, V. 3, pp. 251-264. 1992.
Cockburn1994	Cockburn, B.F. "Tutorial on Semiconductor Memory Testing" Journal of Electronic Testing: Theory and Applications, V. 5, pp. 321-336, 1994.
Cockburn1995	Cockburn, B. F. "Deterministic Tests for Detecting Scrambled Pattern-Sensitive Faults in RAMs" Records of the 1995 IEEE International Workshop on Memory Technology, Design and Testing, pp. 117-122, August 1995.
Crucial1998	Crucial Technology, A Division of Micron "Technical Data Library: Micron Manufactures Memory. Here's how!" http://www.crucial.com/html/manufacturing.html, 1998.
Dance1992	Dance, D. and Gildersleeve, K. "Estimating Semiconductor Yield from Equipment Particle Measurements" IEEE/SEMI International Semiconductor Manufacturing Science Symposium, pp. 18-23, 1992.
Dell1997	Dell, T. J. "A White Paper on the Benefits of Chipkill-Correct ECC for PC Server Main Memory" http://www.chips.ibm.com, November 1997.
Dodd1996	Dodd, P. E., Sexton, F. W., Hash, G. L., et al. "Impact of Technology Trends on SEU is CMOS SRAMs" IEEE Transactions on Nuclear Science, V. 43, N. 6, pp. 2797-2804, December 1996.
Elm1994	Elm, C. Klein, M. and Tavangarian, D. "Automatic On-line Memory Tests in Workstations" Records of the 1994 IEEE Int. Workshop on Memory Technology, Design and Testing, pp. 93-103, 1994.
Freeman1996	Freeman, L. B. "Critical Charge Calculations for a Bipolar SRAM Array" IBM Journal of Research and Development, V. 40, N. 1, pp. 119-129, January 1996.
Fujiwara1990	Fujiwara, E. and Pradhan, D.K. "Error-Control Coding in Computers" IEEE Computer, pp. 63-72, July 1990.
Gaitonde1995	Gaitonde, D. D., Walker, D. M. H., Maly, W. "Accurate Yield Estimation of Circuits with Redundancy" The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, IEEE Computer Society Press, pp. 155-163, 1995.
IBM1996	IBM, "Applications Note: Understanding DRAM Operation" http://www.chips.ibm.com, December 1996.
IBM1997a	IBM "Fault Tolerance Decision in DRAM Applications" http://www.chips.ibm.com, July 1997.
IBM1997b	IBM "Quality and Reliability" http://www.chips.ibm.com, 1997.
IBM1998	IBM "How computer chips are made." http://www.chips.ibm.com/technology/makechip, 1998.
Inoue1993	Inoue, M., Yamada, T., Fujiwara, A. "A New Testing Acceleration Chip for Low-Cost Memory Tests" IEEE Design & Test of Computers, pp. 15-19, March 1993.
Johnson1989	Johnson, B. W. Design and Analysis of Fault Tolerant Digital Systems Addison-Wesley, 1989.
Juhnke1995	Juhnke, T. and Klar, H. "Calculation of the Soft Error Rate of Submicron CMOS Logic Circuits" IEEE Journal of Solid-State Circuits, V. 30, N. 7, pp. 830-834, July 1995.
Kalter1990	Kalter, H., Barth, J., Dilorenzo, J., et al. "A 50ns 16Mb DRAM with a 10ns Data Rate" IEEE International Solid-State Circuits Conference, pp. 232-233, 16 February 1990.
Katayama1997	Katayama, Y. "Trends in Semiconductor Memories" IEEE Micro, pp. 10-17, November/December 1997.
Lage1993	Lage, C., Burnett, D., McNelly. T., et al. "Soft Error Rate and Stored Charge Requirements in Advanced High-Density SRAMs" 1993 IEEE International Electron Devices Meeting, pp. 821-824, 1993.
Lala1985	Lala, P. K. Fault Tolerant & Fault Testable Hardware Design Prentice Hall, 1985.
Lantz1996	Lantz II, L. "Tutorial: Soft Errors Induced by Alpha Particles" IEEE Transactions on Reliability, V. 45, N. 2, pp. 174-179, June 1996.
Lelis1996	Lelis, A. J., Murrill, S. R., Oldham, T.R., Robertson, D. N. "Radiation Response of Advanced Commercial SRAMs" IEEE Transactions on Nuclear Science, V. 43, N. 6, pp. 3103-3108, December 1996.
Levi1994	Levi, S.-T. and Agrawala, A. K. Fault Tolerant System Design McGraw-Hill, 1994.
Levy1995	Levy, M. "The Dynamics of DRAM Technology Multiply, Complicate Design Options" EDN, pp. 46-56, January 1995.
Liden1995	Liden, P. and Dahlgren, P. "Coverage of Transistor-Level and Gate-Level Stuck-At Faults in CMOS Checkers" IEEE Int. Symposium on Circuits and Systems, V. 3, pp. 2124-2127, 1995.
Lo1994	Lo, J.-C. "A Fault-Tolerant Associative Approach to On-Line Memory Repair" The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems IEEE Computer Society Press, pp. 168-184, 1994.
Lo1995	Lo, J.-C. "Single Fault Masking Logic Designs with Error Correcting Codes" The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems IEEE Computer Society Press, pp. 296-304, 1995.
Lu1997	Lu, S.-K., Kuo, S.-Y., Wu, C.-W. "Fault-Tolerant Interleaved Memory Systems with Two- Level Redundancy" IEEE Transactions on Computers, V. 46, N. 9, pp. 1028-1034, September 1997.
Lui1991	Lui, P.K. and Muzio, J.C. "Constrained Parity Testing" Journal of Electronic Testing: Theory and Applications, V. 2, pp. 279-291, 1991.
Massengill1996	Massengill, L.W. "Cosmic and Terrestrial Single-Event Radiation Effects in Dynamic Random Access Memories" IEEE Transactions on Nuclear Science, V. 42, N. 2, pp. 576- 593, April 1996.
Mazumder1993	Mazumder, P. "Design of a Fault-Tolerant Three-Dimensional Dynamic Random-Access Memory with On-Chip Error-Correcting Circuit" IEEE Transactions on Computers, V. 42, N. 12, pp. 1453-1468, December 1993.
McEliecee1984	McEliece, R.J. "The Reliability of Computer Memories" Scientific American, V. (?), 88-95, 1984 (?).
McKee1996	McKee, W. R., McAdams, H. P., Smith, E. B., et al. "Cosmic Ray Neutron Induced Upsets as a Major Contributor to the Soft Error Rate of Current and Future Generation DRAMs" 1996 IEEE Annual International Reliability Physics, pp. 1-6, 1996.
Messenger1986	Messenger, G. C., Ash, M. S. The Effects of Radiation on Electronic Systems, Nostrand Reinhold, 1986.
Micron1997a	Micron Technology Inc. "Technical Note: DRAM Module Mean Time Between Failures (MTBF)" http://www.micron.com, March 1997.
Micron1997b	Micron Technology Inc. "Technical Note: DRAM Soft Error Rate Calculations" http://www.micron.com, March 1997.
Micron1998	Micron Technology Inc. "Micron manufactures memory. Here's how!" http://www.crucial.com/html/manufacturing.html, 1998.
Mori1994	Mori, K., Nguyen, N., Keeton, D., Burns, R. "Yield Enhancement with Particle Defects Reduction" The IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems IEEE Computer Society Press, pp. 246-253, 1994.
Muzio1996	Muzio, J., Serra, M. CSC 454 Course Notes, Section 16
Nicolaidis1996	Nicolaidis, M. "Theory of Transparent BIST for RAMs" IEEE Transactions on Computers, V. 45, N. 10, pp. 1141-1156, October 1996.
OGorman1994	O'Gorman, T. J. "The Effect of Cosmic Rays on the Soft Error Rate of a DRAM at Ground Level" IEEE Transactions on Electron Devices, V. 41, N. 4, pp. 553-557, April 1994.
OGorman1996	O'Gorman, T. J. and Ross, J. M. "Field Testing for Cosmic Ray Soft Errors in Semiconductor Memories" IBM Journal of Research and Development, V. 40, N. 1, pp. 41- 49, January 1996.
Okuda1997	Okuda, T. and Murotani, T. "A Four-Level Storage 4-Gb DRAM" IEEE Journal of Solid- State Circuits, V. 32, N. 11, pp. 1743-1747, November 1997.
Pradhan1996	Pradhan, D. K. Fault-Tolerant Computer System Design Prentice-Hall, 1996.
Pelton1993	Pelton, T. W. "The Reliability of Dynamic Random Access Memory Chips" Masters Thesis, University of Victoria, 1993.
Prince1991	Prince, B. Semiconductor Memories (second edition) Wiley, 1991.
Sachdev1997	Sachdev, M. "Open Defects in CMOS RAM Address Decoders" IEEE Design & Test of Computers, pp. 26-33, April-June 1997.
Sakata1995	Sakata, T., Horiguchi, M., et al. "An Experimental 220-MHz 1-Gb DRAM with a Distributed-Column-Control Architecture" IEEE Journal of Solid-State Circuits, V. 30 N. 11, pp. 1165-1173, November 1995.
Saluja1994	Saluja, K.K. "On-Chip Testing of Random Access Memories" Journal of Electronic Testing: Theory and Applications, V. 5, pp. 367-376, 1994.
Sarrazin1984	Sarrazin, D.B. and Miroslaw, M. "Fault-Tolerant Semiconductor Memories" IEEE Computer, pp. 49-56, August 1984.
Schmid1994	Schmid, J. R., Parks, H. G., Craigin R., Schrimpf, R. D. "Estimating the Effect of Contamination-Induced Leakage Current in View of DRAM Architectural Trends" IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 241-250, 1994.
Schnable1989	Schnable, G. L. "Failure Mechanisms in Microelectronic Devices" Microelectronic Reliability, Volume I, Reliability, Test and Diagnostics, (Ed. Hakim, E.B.) Artech House, pp. 25-87, 1989.
Shen1990	Shen, Y.-N., Lombardi, F. "Yield Enhancements and Manufacturing Throughput of Redundant Memories by Repairability/Unrepairability Detection" Journal of Electronic Testing: Theory and Applications, V. 1, pp. 43-57, 1990.
Stapper1986	Stapper, C.H. "The Defect-Sensitivity Effect of Memory Chips" IEEE Journal of Solid-State Circuits, V. SC-21, N. 1, pp. 193-198, February 1986.
Taber1993	Taber, A. and Normand, E. "Single Event Upset in Avionics" IEEE Transactions on Nuclear Science, V. 40, N. 2, pp. 120-126, April 1993.
Taber1996	Taber, A. H. and Ziegler, J. F. "Accelerated Testing for Cosmic Soft-Error Rate" IBM Journal of Research and Development, V. 40, N. 1, pp. 51-72, January 1996.
Tang1996	Tang, H. H. K. "Nuclear Physics of Cosmic Ray Interaction with Semiconductor Materials: Particle-Induced Soft Errors from a Physicist's Perspective" IBM Journal of Research and Development, V. 40, N. 1, pp. 91-118, January 1996.
Thompson1996	Thompson, K. "Intel and the Myths of Test" IEEE Design & Test of Computers, pp. 79-81, Spring 1996.
Tosaka1997	Tosaka, Y., Satoh, S., et al. "Cosmic Ray Neutron-Induced Soft Errors in Sub-Half Micron CMOS Circuits" IEEE Electron Device Letters, V. 18, N. 3, pp. 99-101, March 1997.
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